1. Technology Field
The present invention generally relates to a data storage method for a flash memory, and more particularly, to a data storage method for storing data by using different physical addresses according to the usage rate of a flash memory, and a flash memory controller and a flash memory storage system using the same.
2. Description of Related Art
Flash memory is one of the most adaptable memories for battery-powered portable electronic products due to its data non-volatility, low power consumption, small volume, and non-mechanical structure. For example, a solid state drive (SSD) is a storage device that uses a NAND flash memory as its storage medium, and which has been broadly used in notebook computers as the main storage device.
Existing NAND flash memories may be categorized into single level cell (SLC) NAND flash memories and multi level cell (MLC) NAND flash memories according to the number of bits stored in each memory cell. To be specific, the memory cells of a SLC NAND flash memory can only be programmed in single phase, and accordingly each memory cell can only store one bit. While the physical blocks in a MLC NAND flash memory are programmed in multiple phases. Taking a 2-level cell NAND flash memory as an example, the physical blocks thereof are programmed in two phases. During the first phase, data is written into lower pages, and the physical characteristic of the lower pages is similar to that of a SLC NAND flash memory. After the first phase is completed, the second phase may be performed to program upper pages, wherein the writing speed of the lower pages is faster than that of the upper pages. Thus, the pages in each physical block are categorized into slow pages (i.e., upper pages) and fast pages (i.e., lower pages).
Similarly, in an 8- or 16-level cell NAND flash memory, each memory cell has more pages and accordingly data is written in more phases. Herein the page having the fastest writing speed is defined as the lower page, while the other pages having slower writing speeds are all defined as upper pages. An upper page may include a plurality of pages having different writing speeds. In addition, in other cases, the upper page may also be defined as the page having the slowest writing speed or the page having the slowest writing speed and some of the pages having faster writing speeds than the slowest writing speed. For example, in a 4-level memory cell, the lower pages are defined as the pages having the fastest and the second fastest writing speeds, while the upper pages are defined as the pages having the slowest and second slowest writing speeds.
Compared to the MLC NAND flash memory, a SLC NAND flash memory has higher access speed. However, the MLC NAND flash memory offers higher storage capacity and lower cost. Thereby, how to increase the access speed of the MLC NAND flash memory so as to improve the efficiency of a flash memory storage device has become one of the major subjects in the industry.
Nothing herein should be construed as an admission of knowledge in the prior art of any portion of the present invention. Furthermore, citation or identification of any document in this application is not an admission that such document is available as prior art to the present invention, or that any reference forms a part of the common general knowledge in the art.